An Nmos Transistor with Localized Channel and Pocket Implantation

As the channel length of transistor is reduced,well-known charge sharing effects in the channel and high electric fields at the drain-channel interface become important elements to impact CMOS device performance. Digital circuits fabricated with minimal channel lengths do not show significant performance improvement unless other device design issues such as parasitic source/drain capacitance and bulk effect are also resolved during the device design cycle. This book adresses both, how to improve short channel effect as well as decrease bulk effect and source/drain capacitance as the transistor effective channel length is reduced.